Alper Yazar

PhD, Electrical and Electronics Engineering

2016 - Current

Middle East Technical University (METU)

Ankara, Turkey

• Area of Study: Heterogeneous Architectures, Accelerated Clouds
• Advisor: Prof. Ece Güran Schmidt
• Major Field: Computers, Minor Field: Telecommunications
• CGPA: 3.75/4.00

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MSc, Electrical and Electronics Engineering

2012 - 2015

Middle East Technical University (METU)

Ankara, Turkey

• Area of Study: Statistical Signal Processing
• Thesis: Application of F-test Method on Model Order Selection and Related Problems
• Advisor: Prof. Çağatay Candan
• Field: Signal Processing
• CGPA: 3.64/4.00

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BSc, Electrical and Electronics Engineering

2007 - 2012

Middle East Technical University (METU)

Ankara, Turkey

• Specialization Fields: Computers and Telecommunications
• CGPA: 3.93/4.00

Electronics Engineer / ASELSAN

2012 - Current

Ankara, Turkey

Most of the time I design embedded things (like bare metal programming, RTOS, embedded Linux) + FPGAs (mostly Xilinx products). Previously, also worked on board design (schematic + layout). Company web site

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Project co-manager + Design Engineer / ACCLOUD Project

2018 - 2021

ACCLOUD was a resarch project on FPGA accelerated cloud computing. The work was supported by aTUBITAK and ASELSAN. I was one of the two project managers and responsible for architecture design + FPGA implementation (operational at 40 Gbps line rate).

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Intern / ASELSAN

2011

Ankara, Turkey

Company web site

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Intern / Bosch Rexroth

2010

Bursa, Turkey

Company web site

alperyazar.bib

Patent

• Yazar, A. (2018). A Configurable Latch Circuit with Low Leakage Current and Instant Trigger Input. WO2018004496A1 TR201609051A2 PDF PDF (🇹🇷)

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Thesis

• Yazar, A. (2015). Application of F-test method on model order selectionand related problems (Master's thesis, Middle East Technical University). Link PDF

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Conference

• Tırlıoğlu, A., Demir, Ö. B., Yazar, A., & Schmidt, E. G. (2021, June). Hardware Accelerators for Cloud Computing: Features and Implementation. In 2021 29th Signal Processing and Communications Applications Conference (SIU) (pp. 1-4). IEEE. DOI: 10.1109/SIU53274.2021.9478015 PDF 🇹🇷
• Yazıcı, F., Yıldız, A. S., Yazar, A., & Schmidt, E. G. (2020, November). A Novel Scalable On-chip Switch Architecture with Quality of Service Support for Hardware Accelerated Cloud Data Centers. In 2020 IEEE 9th International Conference on Cloud Networking (CloudNet) (pp. 1-4). IEEE. DOI: 10.1109/CloudNet51028.2020.9335788 PDF
• Yazıcı, F., Yıldız, A. S., Yazar, A., & Schmidt, E. G. (2020, October). An On-chip Switch Architecture for Hardware Accelerated Cloud Computing Systems. In 2020 28th Signal Processing and Communications Applications Conference (SIU) (pp. 1-4). IEEE. DOI: 10.1109/SIU49456.2020.9302370 PDF 🇹🇷
• Erol, A., Yazar, A., & Schmidt, E. G. (2019, July). OpenStack Generalization for Hardware Accelerated Clouds. In 2019 28th International Conference on Computer Communication and Networks (ICCCN) (pp. 1-8). IEEE. DOI: 10.1109/ICCCN.2019.8847115 PDF
• Ekici, N. U., Schmidt, K. W., Yazar, A., & Schmidt, E. G. (2019, July). Resource allocation for minimized power consumption in hardware accelerated clouds. In 2019 28th International Conference on Computer Communication and Networks (ICCCN) (pp. 1-8). IEEE. DOI: 10.1109/ICCCN.2019.8847159 PDF
• Koltuk, F., Yazar, A., & Schmidt, E. G. (2019, April). Cloudgen: Workload generation for the evaluation of cloud computing systems. In 2019 27th Signal Processing and Communications Applications Conference (SIU) (pp. 1-4). IEEE. DOI: 10.1109/SIU.2019.8806358 PDF 🇹🇷
• Erol, A., Yazar, A., & Schmidt, E. G. (2019, April). A generalization of openstack for managing heterogeneous cloud resources. In 2019 27th Signal Processing and Communications Applications Conference (SIU) (pp. 1-4). IEEE. DOI: 10.1109/SIU.2019.8806551 PDF 🇹🇷
• Ekici, N. U., Schmidt, K. W., Yazar, A., & Schmidt, E. G. (2019, April). ACCLOUD-MAN - Power Efficient Resource Allocation for Heterogeneous Clouds. In 2019 27th Signal Processing and Communications Applications Conference (SIU) (pp. 1-4). IEEE. DOI: 10.1109/SIU.2019.8806247 PDF 🇹🇷
• Yazar, A. (2018). Bir Açık Kaynak Kodlu Gerçek Zamanlı İşletim Sistemi (FreeRTOS) ile Gömülü Yazılım Geliştirme Çalışmaları. In 2018 9th Savunma Teknolojileri Kongresi (SAVTEK) (pp. 1–8). Bildiri Sunum 🇹🇷
• Yazar, A., Erol, A., & Schmidt, E. G. (2018, May). ACCLOUD (Accelerated CLOUD): A novel FPGA-Accelerated cloud archictecture. In 2018 26th Signal Processing and Communications Applications Conference (SIU) (pp. 1-4). IEEE. DOI: 10.1109/SIU.2018.8404548 PDF 🇹🇷
• Yazar, A., & Candan, Ç. (2015, May). Analysis window length selection for linear signal models. In 2015 23nd Signal Processing and Communications Applications Conference (SIU) (pp. 1301-1304). IEEE. DOI: 10.1109/SIU.2015.7130078 PDF 🇹🇷

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Poster

• Yazar, A. (2015, March). Model Order Selection Using F-Test. In 2015 METU EEE Graduate Research Workshop (GRW). METU. Poster Abstract

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Lecture Note

• Yazar, A. (2017) Compiled Lecture Notes of EE533 Information Theory. PDF
• Yazar, A. (2014) Compiled Lecture Notes of EE604 Sensor Array Signal Processing. PDF

Funded

• ACCLOUD A Novel, FPGA-Accelerated Cloud Architecture Project co-manager + design engineer. Completed Link

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Hobby

• asynx.dev A platform especially for embedded + FPGA engineers. Currently active Link
• SSTBIOSProg Simple programmer for SST brand BIOS EEPROMs. Completed TODO: Add link
• Sureli2Calibre Python script to add periodicals into an existing Calibre library. Completed Link
• aPCmeter It is used to monitor CPU and RAM usage of a computer via vintage looking illuminated gauges. aPCmeter uses Arduino Nano v3 as controller Completed Link Link 2
• Devre, Devreler devre.org and devreler.org projects Historic TODO: Add link 🇹🇷
• isoUSBRS422 isoUSBRS422 is an isolated USB - RS422/RS485 converter. It is designed using KiCad. Link Link2
• NASuX RaspberryPi based NAS device Historic TODO: Add link
• İBTÇ İlk Bilgisayarımı Tekrar Çalıştırma / Trying to fix and boot up my first PC from year 2000. Completed TODO: Add link
• FPGA232KU FPGA RS 232 Kod Üretici / Small EXE written in Python to generate simple UART transceiver in VHDL. Completed Link
• Soğuk Lehim soguklehim.com Historic TODO: Add link 🇹🇷
• Devreler Hakkında devrelerhakkinda.com Historic TODO: Add link 🇹🇷
• İzoyazılım izoyazilim.com Programming oriented version of my İzoelektronik project Historic TODO: Add link 🇹🇷
• Kapasitans e-magazine project on electronics Historic TODO: Add link 🇹🇷
• İzoelektronik izoelektronik.com Historic TODO: Add link 🇹🇷

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Class

PhD

• EE542 Computer Networks. Evaluation and minor improvements on ClassBench
• CENG513 Wireless Communication and Networks. A load balancing algorithm for multi-user multiple access point wireless networks

MSc

• EE604 Sensor Array Signal Processing. Implementation and evaluation of two source localization methods on MATLAB: Triangulation and RSS

BSc

• EE493, EE494 Engineering Design. Being a member of a team with four members, designed a voice controlled car capable of auto collision avoidance. Speech processing was done using MATLAB on a PC. Commands were transferred to car over RF channel. An RF communication protocol was developed top on FSK modulation.
• EE430 Digital Signal Processing. Designed and implemented FSK based communication system over acoustic air channel using MATLAB and standard microphone/speaker of a PC.
• EE314 Digital Electronics Laboratory. Designed clone of "Space Invaders" game on FPGA board with VGA output using Verilog as HDL an XilinX ISE tools.
• EE313 Analog Electronics Laboratory. Designed an op-amp using discrete transistors and passives.
• EE214 Electronic Circuits Laboratory. Designed a DC-DC boost converter using discrete components.
• EE213 Electrical Circuits Laboratory. Designed RGB color sensor using OPAMPs and discrete components.

Electronics

• Power and Analog Applications. 2016. EMPA on behalf of Texas Instruments. 8 hours.
• Mentor Graphics Workshop Day. 2015. CDT. 8 hours.
• Mentor Graphics Workshop Day. 2014. CDT. 8 hours.
• Mentor Graphics DxDesigner Training Course. 2014. CDT on behalf of Mentor Graphics. 20 hours.†
• EMC Seminar. 2014. Würth Elektronik GmbH. 8 hours.†
• Power Seminar. 2014. Linear Technology. 8 hours.†

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Embedded

• FreeRTOS Real-Time Programming. 2018. Doulos. 24 hours.†
• Developing with Embedded Linux. 2017. Doulos. 32 hours.†
• The Programmable Logic Training Course Professional ZYNQ. 2016. PLC2. 40 hours.†
• Basics of VxWorks. 2016. ASELSAN. 40 hours.
• C6000 Embedded Design Workshop using BIOS. 2013. Texas Instruments. 40 hours.†

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FPGA

• Vivado Timing Constraints and Analysis. 2021. PLC2. 16 hours.†
• Vivado HLS. 2016. PLC2. 8 hours.
• The Programmable Logic Training Course Professional VHDL. 2016. PLC2. 40 hours.†
• Easy Start FPGA. PLC2. 8 hours.

† Printed certificate is available

• TUBITAK 2228-National MSc and PhD Scholarship Programme for Senior Undergraduate Students. 2012 - 2015.
• Capstone Design Project Honorable Mention Award. 2011.
• Bulent Kerim Altay Award. 2011.‡
• Bulent Kerim Altay Award. 2011.‡
• Bulent Kerim Altay Award. 2010.‡
• Bulent Kerim Altay Award. 2010.‡
• Bulent Kerim Altay Award. 2008.‡
• Dean's List. 2008 - 2011.

‡ About the award

• Embedded World. 2018. Nürnberg, Germany. Attendee

• IEEE. Past
• IEEE Robotics and Automation Society. Past
• IEEE Signal Processing Society. Past
• IEEE ODTÜ. Past
• ODTÜ KTMT. Past

• Trying playing various musical instruments