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Introduction to Computing Systems: From Bits and Gates to C and Beyond, Yale N. Patt & Sanjay J. Patel, isbn:9780071245012, google:N5VmPgAACAAJ

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Digital Design and Computer Architecture, Second Edition, David Harris & Sarah Harris, isbn:9780123944245, amazon:0123944244

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Journal

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Bloom, B. H. (1970). Space/time trade-offs in hash coding with allowable errors. Communications of the ACM, 13(7), 422-426. Link

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Conference

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Jouppi, N. P., Young, C., Patil, N., Patterson, D., Agrawal, G., Bajwa, R., … & Boyle, R. (2017, June). In-datacenter performance analysis of a tensor processing unit. In 2017 ACM/IEEE 44th Annual International Symposium on Computer Architecture (ISCA) (pp. 1-12). IEEE. Link

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Van Der Veen, V., Fratantonio, Y., Lindorfer, M., Gruss, D., Maurice, C., Vigna, G., … & Giuffrida, C. (2016, October). Drammer: Deterministic rowhammer attacks on mobile platforms. In Proceedings of the 2016 ACM SIGSAC conference on computer and communications security (pp. 1675-1689). ACM. Link

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Mutlu, O. (2017, March). The RowHammer problem and other issues we may face as memory becomes denser. In Proceedings of the Conference on Design, Automation & Test in Europe (pp. 1116-1121). European Design and Automation Association. Link

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Mutlu, T. M. O. (2007). Memory performance attacks: Denial of memory service in multi-core systems. In USENIX security. Link

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Mutlu, O., & Moscibroda, T. (2008, June). Parallelism-aware batch scheduling: Enhancing both performance and fairness of shared DRAM systems. In ACM SIGARCH Computer Architecture News (Vol. 36, No. 3, pp. 63-74). IEEE Computer Society. Link

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Patent

zuravleff1997controller

Zuravleff, W. K., & Robinson, T. (1997). U.S. Patent No. 5,630,096. Washington, DC: U.S. Patent and Trademark Office. Link

Other

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Hamming, R., & Kaiser, J. F. (1986). You and your research. Transcription of the Bell Communications Research Colloquium Seminar. University of Virginia, 7. Link

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Klaiber, A. (2000). The technology behind Crusoe processors. Transmeta Technical Brief. Link

dehnert2003transmeta

Dehnert, J. C., Grant, B. K., Banning, J. P., Johnson, R., Kistler, T., Klaiber, A., & Mattson, J. (2003, March). The Transmeta Code Morphing™ Software: using speculation, recovery, and adaptive retranslation to address real-life challenges. In Proceedings of the international symposium on Code generation and optimization: feedback-directed and runtime optimization (pp. 15-24). IEEE Computer Society. Link

horn2018reading

Horn, J. (2018). Reading privileged memory with a side-channel. Project Zero, 3. Link

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Seaborn, M., & Dullien, T. (2015). Exploiting the DRAM rowhammer bug to gain kernel privileges. Black Hat, 15. Link

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Liu, J., Jaiyen, B., Veras, R., & Mutlu, O. (2012, June). RAIDR: Retention-aware intelligent DRAM refresh. In ACM SIGARCH Computer Architecture News (Vol. 40, No. 3, pp. 1-12). IEEE Computer Society. Link

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Mutlu, O. (2013, May). Memory scaling: A systems architecture perspective. In 2013 5th IEEE International Memory Workshop (pp. 21-25). IEEE. Link

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Moore, G. E. (1965). Cramming more components onto integrated circuits. Link

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Von Neumann, J., & Brucks, G. (1946). Preliminary discussion of the logical design of an electronic computing instrument. Link