Bibliography

Book

[patt2005introduction]Introduction to Computing Systems: From Bits and Gates to C and Beyond, Yale N. Patt & Sanjay J. Patel, isbn:9780071245012, google:N5VmPgAACAAJ
[harris2012digital]Digital Design and Computer Architecture, Second Edition, David Harris & Sarah Harris, isbn:9780123944245, amazon:0123944244
[hamming2012numerical]Hamming, R. (2012). Numerical methods for scientists and engineers. Courier Corporation. Link
[boole1847mathematical]Boole, G. (1847). The mathematical analysis of logic. Philosophical Library.

Journal

[hamming1950error]Hamming, R. W. (1950). Error detecting and error correcting codes. The Bell system technical journal, 29(2), 147-160. Link
[lamport1982byzantine]Lamport, L., Shostak, R., & Pease, M. (1982). The Byzantine generals problem. ACM Transactions on Programming Languages and Systems (TOPLAS), 4(3), 382-401. Link
[bloom1970space]Bloom, B. H. (1970). Space/time trade-offs in hash coding with allowable errors. Communications of the ACM, 13(7), 422-426. Link
[dennard1974design]Dennard, R. H., Gaensslen, F. H., Rideout, V. L., Bassous, E., & LeBlanc, A. R. (1974). Design of ion-implanted MOSFET’s with very small physical dimensions. IEEE Journal of Solid-State Circuits, 9(5), 256-268. Link

Conference

[jouppi2017datacenter]Jouppi, N. P., Young, C., Patil, N., Patterson, D., Agrawal, G., Bajwa, R., … & Boyle, R. (2017, June). In-datacenter performance analysis of a tensor processing unit. In 2017 ACM/IEEE 44th Annual International Symposium on Computer Architecture (ISCA) (pp. 1-12). IEEE. Link
[gruss2016rowhammer]Gruss, D., Maurice, C., & Mangard, S. (2016, July). Rowhammer. js: A remote software-induced fault attack in javascript. In International Conference on Detection of Intrusions and Malware, and Vulnerability Assessment (pp. 300-321). Springer, Cham. Link
[van2016drammer]Van Der Veen, V., Fratantonio, Y., Lindorfer, M., Gruss, D., Maurice, C., Vigna, G., … & Giuffrida, C. (2016, October). Drammer: Deterministic rowhammer attacks on mobile platforms. In Proceedings of the 2016 ACM SIGSAC conference on computer and communications security (pp. 1675-1689). ACM. Link
[kim2014flipping]Kim, Y., Daly, R., Kim, J., Fallin, C., Lee, J. H., Lee, D., … & Mutlu, O. (2014, June). Flipping bits in memory without accessing them: An experimental study of DRAM disturbance errors. In ACM SIGARCH Computer Architecture News (Vol. 42, No. 3, pp. 361-372). IEEE Press. Link
[mutlu2017rowhammer]Mutlu, O. (2017, March). The RowHammer problem and other issues we may face as memory becomes denser. In Proceedings of the Conference on Design, Automation & Test in Europe (pp. 1116-1121). European Design and Automation Association. Link
[mutlu2007memory]Mutlu, T. M. O. (2007). Memory performance attacks: Denial of memory service in multi-core systems. In USENIX security. Link
[rixner2000memory]Rixner, S., Dally, W. J., Kapasi, U. J., Mattson, P., & Owens, J. D. (2000, June). Memory access scheduling. In ACM SIGARCH Computer Architecture News (Vol. 28, No. 2, pp. 128-138). ACM. Link
[mutlu2007stall]Mutlu, O., & Moscibroda, T. (2007, December). Stall-time fair memory access scheduling for chip multiprocessors. In Proceedings of the 40th Annual IEEE/ACM international Symposium on Microarchitecture (pp. 146-160). IEEE Computer Society. Link
[mutlu2008parallelism]Mutlu, O., & Moscibroda, T. (2008, June). Parallelism-aware batch scheduling: Enhancing both performance and fairness of shared DRAM systems. In ACM SIGARCH Computer Architecture News (Vol. 36, No. 3, pp. 63-74). IEEE Computer Society. Link
[muralidhara2011reducing]Muralidhara, S. P., Subramanian, L., Mutlu, O., Kandemir, M., & Moscibroda, T. (2011, December). Reducing memory interference in multicore systems via application-aware memory channel partitioning. In Proceedings of the 44th Annual IEEE/ACM International Symposium on Microarchitecture (pp. 374-385). ACM. Link
[chang2014improving]Chang, K. K. W., Lee, D., Chishti, Z., Alameldeen, A. R., Wilkerson, C., Kim, Y., & Mutlu, O. (2014, February). Improving DRAM performance by parallelizing refreshes with accesses. In 2014 IEEE 20th International Symposium on High Performance Computer Architecture (HPCA) (pp. 356-367). IEEE. Link

Patent

[zuravleff1997controller]Zuravleff, W. K., & Robinson, T. (1997). U.S. Patent No. 5,630,096. Washington, DC: U.S. Patent and Trademark Office. Link

Other

[hamming1986you]Hamming, R., & Kaiser, J. F. (1986). You and your research. Transcription of the Bell Communications Research Colloquium Seminar. University of Virginia, 7. Link
[klaiber2000technology]Klaiber, A. (2000). The technology behind Crusoe processors. Transmeta Technical Brief. Link
[dehnert2003transmeta]Dehnert, J. C., Grant, B. K., Banning, J. P., Johnson, R., Kistler, T., Klaiber, A., & Mattson, J. (2003, March). The Transmeta Code Morphing™ Software: using speculation, recovery, and adaptive retranslation to address real-life challenges. In Proceedings of the international symposium on Code generation and optimization: feedback-directed and runtime optimization (pp. 15-24). IEEE Computer Society. Link
[horn2018reading]Horn, J. (2018). Reading privileged memory with a side-channel. Project Zero, 3. Link
[seaborn2015exploiting]Seaborn, M., & Dullien, T. (2015). Exploiting the DRAM rowhammer bug to gain kernel privileges. Black Hat, 15. Link
[liu2012raidr]Liu, J., Jaiyen, B., Veras, R., & Mutlu, O. (2012, June). RAIDR: Retention-aware intelligent DRAM refresh. In ACM SIGARCH Computer Architecture News (Vol. 40, No. 3, pp. 1-12). IEEE Computer Society. Link
[mutlu2013memory]Mutlu, O. (2013, May). Memory scaling: A systems architecture perspective. In 2013 5th IEEE International Memory Workshop (pp. 21-25). IEEE. Link
[moore1965cramming]Moore, G. E. (1965). Cramming more components onto integrated circuits. Link
[von1946preliminary]Von Neumann, J., & Brucks, G. (1946). Preliminary discussion of the logical design of an electronic computing instrument. Link